Sr/Principal Engineer: FPGA/ASIC Engineer - Dulles - TS/SCI required

In this role, you will be responsible for research, requirements analysis and systems architecture, design, coding, test bench design, verification, synthesis and place, & route for our Command and Data Handling (CD&H) products.

The qualified applicant will join the Electrical Engineering Avionics department that specializes in FPGA/ASIC for space applications.

This is a dual level requisition which can be filled as a Principal Digital Engineer or Sr Principal Digital Engineer

Basic Qualifications: Principal Digital Engineer

• 5 years of relevant professional experience with a Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering or other STEM (Science, Technology, Engineering or Mathematics) discipline; 3 years with Masters; 0 years with a PhD
• Must have hands on experience with VHDL within the past 3 years
• Well versed in VHDL design for an aerospace environment or space application
• Proficient in FPGA design flow including items such as RTL/gate level simulation, synthesis, place and route, static timing analysis, and power analysis
• US Citizen
• Must possess an active/current Top-Secret/SCI at time of application

Basic Qualifications: Sr. Principal Digital Engineer

• 9 years of relevant professional experience with a Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering or other STEM (Science, Technology, Engineering or Mathematics) discipline; 7 years with Masters; 4 years with a PhD
• Experience with VHDL design or Advanced /verification ​for FPGA’s
• Must have hands on experience with VHDL within the past 3 years
• Well versed in VHDL design for an aerospace environment or space application
• Proficient in FPGA design flow including items such as RTL/gate level simulation, synthesis, place and route, static timing analysis, and power analysis
• Experience with translating system requirements into programmable logic requirements, design documents, and test specifications
• Proven experience defining architectures or team leadership
• US Citizen
• Must possess an active/current Top-Secret/SCI.

Preferred Qualifications:

• Experience with DSP, MATLAB, and SimuLink
• Experience with VHDL design for Software Defined Radios
• Experience with Xilinx and Microchip (RTG4) devices.
• Experience with Electronic Design Automation (EDA) Tools: Vivado, Quartus, QuestaSim.
• Knowledgeable in FPGA physical constraints and achieving timing closure.
• Experience with board or system level debug using test equipment such as oscilloscopes and logic analyzers.
• Generation of Test Benches and support of formal VHDL Verification

The Northrop Grumman Tactical Space Division is a strategic partner specializing in commercial and classified partnerships with the design, delivery, operation and sustainment of satellites and human spacecraft.  We support science and space exploration through our various partnerships, including NASA’s Artemis program with the goal to return humans to the Moon in 2024 and the TESS (Transiting Exoplanet Survey Satellite) program that has discovered more than twenty confirmed plants.  Recognized as an industry leader, we also develop highly specialized space and satellite components.